"Statistical Timing Analysis Considering Clock Jitter and Skew due to Power Supply Noise and Process Variation"
また、昨年度に卒業した阿部慎也君の研究成果を橋本が代理で発表しました(2010/3/19)。
"Clock Skew Reduction by Self-Compensating Manufacturing Variability with On-chip Sensors"
Saturday, March 20, 2010
TAU 2010
カリフォルニア州サンフランシスコで開催されたTAU(ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems)でD2の榎並孝司君が研究成果を発表をしました(2010/3/18)。
"Statistical Timing Analysis Considering Clock Jitter and Skew due to Power Supply Noise and Process Variation"
また、昨年度に卒業した阿部慎也君の研究成果を橋本が代理で発表しました(2010/3/19)。
"Clock Skew Reduction by Self-Compensating Manufacturing Variability with On-chip Sensors"
"Statistical Timing Analysis Considering Clock Jitter and Skew due to Power Supply Noise and Process Variation"
また、昨年度に卒業した阿部慎也君の研究成果を橋本が代理で発表しました(2010/3/19)。
"Clock Skew Reduction by Self-Compensating Manufacturing Variability with On-chip Sensors"
